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| DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The SN54 / 74LS155 and SN54 / 74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder "a" has an Enable gate with one active HIGH and one active LOW input. Decoder "b" has two active LOW Enable inputs. If the Enable functions are satisfied, one output of each decoder will be LOW as selected by the address inputs. The LS156 has open collector outputs for wired-OR (DOT-AND) decoding and function generator applications. The LS155 and LS156 are fabricated with the Schottky barrier diode process for high speed and are completely compatible with all Motorola TTL families. SN54/74LS155 SN54/74LS156 DUAL 1-OF-4 DECODER / DEMULTIPLEXER LS156-OPEN-COLLECTOR LOW POWER SCHOTTKY * * * * * * Schottky Process for High Speed Multifunction Capability Common Address Inputs True or Complement Data Demultiplexing Input Clamp Diodes Limit High Speed Termination Effects ESD > 3500 Volts J SUFFIX CERAMIC CASE 620-09 16 1 16 N SUFFIX PLASTIC CASE 648-08 1 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 Eb 15 Eb 14 A0 13 O3b 12 O2b 11 O1b 10 O0b 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 16 1 D SUFFIX SOIC CASE 751B-03 ORDERING INFORMATION 1 Ea 2 Ea 3 A1 4 O3a 5 O2a 6 O1a 8 7 O0a GND SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC LOGIC SYMBOL PIN NAMES A0, A1 Ea, Eb Ea O0 - O3 Address Inputs Enable (Active LOW) Inputs Enable (Active HIGH) Input Active LOW Outputs (Note b) LOADING (Note a) HIGH 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. 0 1 12 13 3 14 15 E DECODER a 2 3 A0 A1 A0 A1 0 1 E DECODER b 2 3 NOTES: a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. The HIGH level drive for the LS156 must be established by an external resistor. 7 6 5 4 9 VCC = PIN 16 GND = PIN 8 10 11 12 FAST AND LS TTL DATA 5-1 SN54/74LS155 * SN54/74LS156 LOGIC DIAGRAM 1 Ea Ea 2 13 A0 A1 3 14 Eb Eb 15 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 7 6 5 4 9 10 11 12 O0a O1a O2a O3a O0b O1b O2b O3b FUNCTIONAL DESCRIPTION The LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address inputs and separate gated Enable inputs. When enabled, each decoder section accepts the binary weighted Address inputs (A0, A1) and provides four mutually exclusive active LOW outputs (O0 - O3). If the Enable requirements of each decoder are not met, all outputs of that decoder are HIGH. Each decoder section has a 2-input enable gate. The enable gate for Decoder "a" requires one active HIGH input and one active LOW input (Ea*Ea). In demultiplexing applications, Decoder "a" can accept either true or complemented data by using the Ea or Ea inputs respectively. The enable gate for Decoder "b" requires two active LOW inputs (Eb*Eb). The LS155 or LS156 can be used as a 1-of-8 Decoder/Demultiplexer by tying Ea to Eb and relabeling the common connection as (A2). The other Eb and Ea are connected together to form the common enable. The LS155 and LS156 can be used to generate all four minterms of two variables. These four minterms are useful in some applications replacing multiple gate functions as shown in Fig. a. The LS156 has the further advantage of being able to AND the minterm functions by tying outputs together. Any number of terms can be wired-AND as shown below. f = (E + A0 + A1) (E + A0 + A1) (E + A0 + A1) (E + A0 + A1) where E = Ea + Ea; E = Eb + Eb E A0 A1 E A0 A1 E A0 A1 E A0 A1 E O0 A0 A1 E O1 A0 A1 E O2 A0 A1 E O3 A0 A1 O0 O1 O2 O3 Figure a TRUTH TABLE ADDRESS A0 X X L H L H A1 X X L L H H ENABLE "a" Ea L X H H H H Ea X H L L L L O0 H H L H H H OUTPUT "a" O1 H H H L H H O2 H H H H L H O3 H H H H H L ENABLE "b" Eb H X L L L L Eb X H L L L L O0 H H L H H H OUTPUT "b" O1 H H H L H H O2 H H H H L H O3 H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care FAST AND LS TTL DATA 5-2 SN54/74LS155 GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current -- High Output Current -- Low Parameter 54 74 54 74 54, 74 54 74 Min 4.5 4.75 - 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 - 0.4 4.0 8.0 Unit V C mA mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol S bl VIH VIL VIK VOH Parameter P Input HIGH Voltage 54 Input LOW Voltage 74 Input Clamp Diode Voltage 54 Output HIGH Voltage 74 54, 74 VOL Output LOW Voltage 74 Input HIGH Current 0.1 Input LOW Current Short Circuit Current (Note 1) Power Supply Current - 20 - 0.4 - 100 10 0.35 0.5 20 IIH IIL IOS ICC V A mA mA mA mA 2.7 3.5 0.25 0.4 V V 2.5 - 0.65 3.5 0.8 - 1.5 V V Min 2.0 0.7 V Typ Max Unit Ui V Test C di i T Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for p g All Inputs VCC = MIN, IIN = - 18 mA VCC = MIN, IOH = MAX, VIN = VIH , , or VIL per Truth Table IOL = 4.0 mA IOL = 8.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX VCC = MAX Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25C) Limits Symbol S bl tPLH tPHL tPLH tPHL tPLH tPHL Parameter P Propagation Delay Address, Ea or Eb to Output Propagation Delay Address to Output Propagation Delay Ea to Output Min Typ 10 19 17 19 18 18 Max 15 30 26 30 27 27 Unit Ui ns ns ns Figure 1 Figure 2 Figure 1 VCC = 5.0 V 50 CL = 15 pF Test C di i T Conditions AC WAVEFORMS VIN 1.3 V tPHL VOUT 1.3 V 1.3 V tPLH 1.3 V VOUT 1.3 V tPHL 1.3 V 1.3 V tPLH 1.3 V VIN Figure 1 Figure 2 FAST AND LS TTL DATA 5-3 SN54/74LS156 GUARANTEED OPERATING RANGES Symbol VCC TA VOH IOL Supply Voltage Operating Ambient Temperature Range Output Voltage -- High Output Current -- Low Parameter 54 74 54 74 54, 74 54 74 Min 4.5 4.75 - 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 5.5 4.0 8.0 Unit V C V mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol S bl VIH VIL VIK IOH VOL Parameter P Input HIGH Voltage 54 Input LOW Voltage 74 Input Clamp Diode Voltage Output HIGH Current Output LOW Voltage 74 Input HIGH Current 0.1 Input LOW Current Power Supply Current - 0.4 10 0.35 0.5 20 IIH IIL ICC V A mA mA mA 54, 74 54, 74 0.25 - 0.65 0.8 - 1.5 100 0.4 V A V Min 2.0 0.7 V Typ Max Unit Ui V Test C di i T Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for p g All Inputs VCC = MIN, IIN = - 18 mA VCC = MIN, VOH = MAX IOL = 4.0 mA IOL = 8.0 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MAX, VIN = 2.7 V VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX AC CHARACTERISTICS (TA = 25C) Limits Symbol S bl tPLH tPHL tPLH tPHL tPLH tPHL Parameter P Propagation Delay Address, Ea or Eb to Output Propagation Delay Address to Output Propagation Delay Ea to Output Min Typ 25 34 31 34 32 32 Max 40 51 46 51 48 48 Unit Ui ns ns ns Figure 1 Figure 2 Figure 1 VCC = 5.0 V 50 CL = 15 pF RL = 2.0 k Test C di i T Conditions AC WAVEFORMS VIN 1.3 V tPHL VOUT 1.3 V 1.3 V tPLH 1.3 V VOUT 1.3 V tPHL 1.3 V 1.3 V tPLH 1.3 V VIN Figure 1 Figure 2 FAST AND LS TTL DATA 5-4 |
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